Sistema para geração de modelos caixa preta de amplificadores de potência de RF

Abstract

This thesis, developed within the scope of the postgraduate program in Electrical Engineering at UFJF, describes a system implemented in a low-cost FPGA for the evaluation of Power Amplifiers. It also describes a platform capable of estimating changes induced in the channel. FPGAs have high speed and, the lower cost ones, have limited memory. This work aims to build equipment using limited resources, with the intention that the methodologies used can be replicated in other studies in different contexts. Black-box models are obtained from the input/output data of a system and in this work power amplifiers are described mathematically by this approach. This description, due to the non-linearity of the device, is made through the Hammerstein model, which is a non-linear model. The work begins with a brief overview of the basic concepts involved in the thesis. The implementation of electronic systems is compared with that of other authors and the advantages of the methodology used in this Thesis are presented. It describes how signals and systems behave in the discrete domain, summarizes what an FPGA is, and then analyzes figures of merit, tools to measure the quality of models. To achieve the goal of building a low-cost platform, this Thesis presents three chapters dedicated to the construction of the platform. To achieve the objective of building a low-cost platform, the FPGA platform capable of generating signals with various digital modulations that will be used in system identification is presented in chapter 3. An efficient estimation algorithm is constructed using the Least Squares method. The entire construction process is present in chapter 4. The identification of two power amplifiers is shown in chapter 5 and the resulting curve is analyzed, where the results show that the created model represents a real amplifier well. Conclusions about the work and future research are presented in the last chapter. The hypothesis that it is possible to build a low-cost platform for identifying systems using FPGAs is proven as the step-by-step construction of the platform is described during the work. In this sense, at the end, pertinent conclusions are presented for future research based on the data collected and analyzed during the research.